MU Live! Roadshow
Practical technical insight for embedded
teams making MCU platform decisions
Sharper technical questions.
Better design tradeoffs.
More confident MCU platform decisions.
Security expectations are changing. Embedded software workflows are changing. MCU architectures are changing. MU Live! brings these topics together in a practical, engineer-focused format to help teams pressure-test design decisions before they become design constraints.
Designed for embedded developers, senior engineers, architects, technical leads and engineering managers.
Focused on practical design tradeoffs, implementation considerations and current MCU development challenges.
Built around three essential topics: CRA readiness, AI-assisted embedded development and configurable hardware acceleration.
What is changing
Why it matters
What attendees take away
Cybersecurity expectations
Security is moving from a best-practice discussion to a product lifecycle requirement for connected products.
A clearer view of CRA implications, design documentation expectations and security readiness considerations.
Embedded software workflows
Software complexity is growing while engineering teams need faster setup, iteration, debug and documentation access.
A practical look at how AI-assisted workflows and modern VS Code-based tools can reduce friction in embedded development.
MCU architecture choices
Not every performance or responsiveness problem should be solved by adding software complexity or selecting a larger device.
A technical view of how configurable logic can offload tasks, reduce latency and simplify certain application-specific functions.
Embedded design teams are being asked to deliver more capability, stronger security, faster development cycles and longer product lifecycles without adding unnecessary complexity. The MU Live! Roadshow is built to help engineering teams step back from day-to-day execution and evaluate three technical shifts that are already influencing MCU-based product decisions.
Come with design questions. Leave with sharper tradeoffs.
This is not a broad product pitch or a hands-on lab. It is a focused technical roadshow designed to help teams understand important shifts in embedded design and discuss practical implementation considerations with Microchip experts.
The value is in connecting technical topics to real product decisions: security architecture, development workflow, peripheral usage, firmware complexity and platform readiness.
Why it is essential
The EU Cyber Resilience Act changes the conversation from whether a product includes security features to how cybersecurity is considered across the product lifecycle. For connected products and products that may enter global markets, design teams need to understand how secure-by-design expectations, vulnerability handling, updates, incident reporting and documentation can influence architecture decisions.
What the session is positioned to cover
The session provides an overview of CRA implications for manufacturers and other economic operators placing products with digital elements on the EU market. It focuses on lifecycle security requirements, compliance challenges and practical readiness considerations for embedded systems.
Proof points for engineers
Security has to be considered early enough to influence architecture. Teams should evaluate secure boot, firmware integrity, key protection, update mechanisms, vulnerability response processes, and the technical evidence needed to support future compliance activities.
Balanced expectation
This session is not a promise that any single MCU, tool or architecture makes a product CRA-compliant. It is intended to help teams better understand the requirements, questions and design considerations they should be evaluating as they prepare.
Cybersecurity is becoming a lifecycle design consideration.
Embedded software teams are under pressure to move faster while managing more code, more configuration, more documentation and more debug complexity. AI-assisted workflows are becoming part of the development-tool conversation because they can help engineers reduce repetitive tasks and navigate project information more efficiently.
The session demonstrates how MPLAB AI Coding Assistant and MPLAB Extensions for VS Code can support a modern embedded development workflow, including project setup, documentation access, code assistance, code generation, review, debug support and iteration inside a familiar development environment.
The practical value is not “AI replaces engineering judgment.” The practical value is faster access to device-specific information, reduced setup friction, help with common coding tasks and support for iterative development activities that consume engineering time.
This is not positioned as a claim of guaranteed productivity gains or a replacement for experienced embedded developers. The value proposition is practical assistance inside the workflow engineers already use or are evaluating.
AI is most useful when it removes friction from real engineering work
As MCU-based systems add functionality, using firmware for every timing-sensitive or repetitive task can increase CPU loading, latency and maintenance complexity. Configurable logic gives designers another architectural option directly inside the MCU.
The session explores how the Configurable Logic Block can be used to implement application-specific hardware functionality using combinational logic, sequential logic, lookup tables, interconnects, storage elements and flexible clocking.
CLB can help offload selected tasks from the CPU, reduce firmware complexity, lower latency and enable more deterministic behavior in targeted use cases. It is especially relevant when small pieces of custom hardware logic can simplify the overall system architecture.
CLB is not the answer to every performance challenge. The session is intended to help engineers recognize where configurable logic makes sense and how it can complement traditional MCU peripherals and firmware.
Some system problems are cleaner when part of the solution moves out of firmware.
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Audience
Why it is relevant
Design engineers
Evaluate practical security, software workflow and hardware acceleration considerations that may affect current and future designs.
Senior engineers and architects
Pressure-test platform choices and identify where architecture decisions may reduce risk or complexity.
Engineering managers
Understand technical trends that influence schedule risk, team productivity, regulatory readiness and product maintainability.
Technical decision makers
Compare emerging embedded design approaches and identify where deeper technical evaluation is warranted.
